Hdl Chip Design: A Practical Guide for Designing, Synthesizing & Simulating Asics & Fpgas Using Vhdl or Verilog free ebook download
Douglas J. Smith
12/11/2016 7:00:34 PM
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This book is the Electronic Engineers' comprehensive VHDL/Verilog modeling guide for ASIC and FPGAs. This book describes, and shows by practical example, how to design ASIC and FPGA devices using the two industry standard hardware description languages, VHDL and Verilog. The emphasis is on RTL modeling using synthesis within a top-down design methodology.
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